The present invention relates, in general to magnetic materials, and more particularly, to a novel magnetoresistive material.
In the past, a variety of magnetic materials and structures have been utilized to form magnetoresistive materials for non-volatile memory elements, read/write heads for disk drives, and other magnetic type applications. One prior magnetoresistive element utilized a magnetoresistive material that has two magnetic layers separated by a conductor layer. The magnetization vectors of the two magnetic layers typically are anti-parallel to each other in the absence of any magnetic fields. The magnetization vectors of one of the layers points in one direction and the magnetization vector of the other layer always points in the opposite direction. The magnetic characteristics of such magnetic materials typically require a width greater than one micron in order to maintain the orientation of the magnetization vectors along the width of the cell. The large width requirement limits the density of memories utilizing such materials. Additionally, reading the state of such memories typically requires a two-phase read operation that results in very long read cycles. The two phase read operation also requires extra circuitry to determine the state of the memory, thus increasing the cost of such memories. An example of such a magnetic material and memory is disclosed in U.S. Pat. No. 4,780,848 issued to Daughton et al. on Oct. 25, 1988.
Another prior material uses multi-layer giant magnetoresistive materials (GMR) and utilizes submicron widths, in order to increase density. In this structure the magnetization vectors are parallel to the length of the magnetic material instead of the width. The magnetization vector of one magnetic material layer is always maintained in one direction while the magnetization vector of the second magnetic layer switches between parallel and antiparallel to the first vector in order to represent both logical "0" and "1" states. In order to determine the logical state of a memory cell utilizing this material, the memory cell has a reference cell and an active cell. The reference cell always provides a voltage corresponding to one state (either always a "1" or always a "0"). The output of the reference cell is compared to the output of the active cell in order to determine the state of the memory cell. The requirement for an active and a reference cell reduces the density of a memory that utilizes such elements. Additionally, each memory cell requires transistors to switch the active and reference cells at appropriate times in order to read the cells. This further increases the cost of the memory.
Accordingly, it is desirable to have a GMR material that has a submicron width, that does not require multiple read operations to determine the logical state of the memory cell, that results in a high density memory array, and that reduces the cost of a memory utilizing the material.